A Method of Directly Measuring Input Differential Capacitance of Operational Amplifier

Input capacitance may become a major specification for high-impedance and high-frequency operational amplifier (op amp) applications. It is worth noting that when the junction capacitance of the photodiode is small, the input capacitance of the operational amplifier will become the dominant factor in noise and bandwidth issues. The input capacitance and feedback resistance of the operational amplifier create a pole in the amplifier’s response, which affects stability and increases noise gain at higher frequencies. Therefore, stability and phase margin may decrease, and output noise may increase.In fact, some previous CDM (differential mode capacitance) measurement techniques are based on high-impedance inverter circuits, stability analysis, and noise

Glen Brisebois and Arthur Alfred Roxas

Introduction

Input capacitance may become a major specification for high-impedance and high-frequency operational amplifier (op amp) applications. It is worth noting that when the junction capacitance of the photodiode is small, the input capacitance of the operational amplifier will become the dominant factor in noise and bandwidth issues. The input capacitance and feedback resistance of the operational amplifier create a pole in the amplifier’s response, which affects stability and increases noise gain at higher frequencies. Therefore, stability and phase margin may decrease, and output noise may increase. In fact, some previous CDM (differential mode capacitance) measurement techniques are based on high-impedance inverter circuits, stability analysis, and noise analysis. These methods can be very cumbersome.

In feedback amplifiers such as operational amplifiers, the total effective input capacitance is composed of CDM and negative input common-mode capacitance (or CCMC to ground) in parallel. One of the reasons why the CDM is difficult to measure is that the main task of the operational amplifier is to prevent the two inputs from being uncorrelated. Compared with the difficulty of measuring CDM, it is relatively easy to directly measure the positive input common mode capacitance CCM+ to the ground. Place a larger series resistor on the non-inverting pin of the operational amplifier and apply a sine wave or noise source, and then a network analyzer or spectrum analyzer can be used to measure the -3 dB frequency response generated by the input capacitance of the operational amplifier. Assume that CCM+ and CCMC are the same, especially for voltage feedback amplifiers. However, in recent years, it has become increasingly difficult to measure CDM; the inherent characteristics of operational amplifiers will force their inputs to be equal, thus bootstrap CDM, so the various technologies used are unsatisfactory. When the input is forcibly separated and the current is measured, the output will try to fight. -The traditional method of detecting CDM is indirect measurement, which relies on the reduction of phase margin and becomes more complicated by using other capacitors such as CCMC in parallel.

We hope that the operational amplifier to be tested can operate normally and perform functions under closed-loop conditions as usual for customers. One possible method suggested is to separate the input and perform output clipping, but this may make the internal circuit inoperable (depending on the op amp topology), so the measured capacitance may not reflect the actual working capacitance. In this method, the input will not be excessively separated to avoid input stage nonlinearity and excessive output swing or clipping. This article will introduce a simple and direct CDM measurement method.

A Method of Directly Measuring Input Differential Capacitance of Operational Amplifier

Figure 1. Direct measurement of CDM impedance in LTspice. Plot the V(r)/I(R1) curve to obtain impedance. In this example, at a frequency of 1 MHz, Z is 19.89437kΩ (10(85.97/20)) at -89.996°. Using the formula C = 1/(2π×Z×Freq), Z is exactly 8 pF.

New method of measuring CDM

The author decided to only use a buffer circuit with a gain of 1, and use a current source to excite the output and the inverting input. The output and inverting input will only change within the allowable range of the operational amplifier. At low frequencies, the output changes very little, so the current through the CDM will be very small. At too high a frequency, the test may be invalid, and the result is useless. But under the intermediate frequency, the gain bandwidth of the operational amplifier will drop, but not too low, the output change can still provide enough large voltage excitation and measurable current through the CDM.

The background noise of LTspice® is almost unlimited, so simple test simulations can be carried out, as shown in Figure 1. When the technology was found to be quite accurate and effective in LTspice, the next question was “Can I get enough SNR in the real world to make good measurements?”

The phase angle is almost equal to -90°, which indicates that the impedance is capacitive. 2 pF common mode capacitance will not destroy the measurement, because CCMC is not in the path, and 1/(2 × π × Freq × CCM+) >> 1 Ω.

Challenge: Find the right equipment and actual test setup

As shown in Figure 1, a 2 kΩ resistor is connected in series with the output of the operational amplifier to convert the excitation from a voltage source to a current source. This will allow a small voltage to exist in node “r” (it will not be too far from the voltage seen in the non-inverting pin of the op amp) and will cause a small current to flow between the inputs of the CDM under test. Of course, the current output voltage is very small (buffered by the device under test (DUT)), and the current in the CDM is also very small (57 nA in this simulation). Very difficult. LTspice.ac and LTspice.tran simulations have no resistance noise, but a 1 Ω resistor in the real world has 130 pA/√Hz noise, and only 57 nV signal can be generated from the expected 57 nA capacitor current. Further simulation shows that replacing R1 with 50Ω or 1 kΩ will not result in excessive loss of current flowing into CCM+ at a frequency within the target bandwidth. In order to obtain a better current measurement technique than simple resistance, a transimpedance amplifier (TIA) can be used instead of R1. The TIA input will be connected to the non-inverting pin of the op amp. Current is required on this pin and the voltage is fixed to virtual ground to eliminate the current in CCMC. In fact, this is exactly how four-port impedance analyzers such as Keysight/Agilent HP4192A are implemented. HP4192A can carry out impedance measurement in the frequency range of 5 Hz to 13 MHz. Some new devices on the market that use the same impedance measurement technology include the E4990A impedance analyzer with a range of 10 Hz to 120 MHz and a precision LCR meter with a range of 20 Hz to 2 MHz (such as Keysight E4980A).

As shown in the test circuit in Figure 2 below, due to the internal TIA of the impedance analyzer, the non-inverting pin of the operational amplifier maintains a virtual ground state. Because of this, both terminals of CCM+ are considered to be at ground potential and therefore will not affect the measurement. The small current generated at both ends of the CDM of the DUT will flow through the feedback resistor Rr of the TIA, and then be measured by the internal voltmeter.

A Method of Directly Measuring Input Differential Capacitance of Operational Amplifier

Figure 2. CDM test circuit.

Any four-port device that uses the auto-balance bridge 1 impedance measurement method is a suitable choice for CDM measurement. They are designed to generate a sine wave from an internal oscillator, which is centered at zero, has positive and negative swings, and can be used for dual power supply. If the operational amplifier DUT is powered by a single power supply, the bias function should be adjusted so that the signal does not clip to ground. The HP4192A is used in Figure 3 and shows the detailed connection with the DUT.

A Method of Directly Measuring Input Differential Capacitance of Operational Amplifier

Figure 3. Test setup for CDM direct measurement method.

Figure 4 shows the exact test setup so that the circuit board and wiring contribute very little to the parasitic capacitance of the CDM. Any general-purpose circuit board can be used for low-speed operational amplifiers, while high-speed operational amplifiers require a stricter PCB layout. The vertically grounded copper divider can ensure that the input and output terminals cannot see other field paths parallel to the DUT CDM.

A Method of Directly Measuring Input Differential Capacitance of Operational Amplifier

Figure 4. HP4192A setup circuit board demonstration. On the right is the excitation and voltage readback through 2 kΩ. The DUT used is an 8-pin SO package LT1792 attached to the LB2223 experiment board. TIA is located on the left side inside HP4192A.

Results and discussion

First, the DUT was not used when measuring the board capacitance of the circuit board. The measurement conditions for the circuit board shown in Figure 4 are 16 fF capacitance and no DUT. This is a fairly small capacitance and can be ignored, because usually the expected value of CDM is several hundred to several thousand fF.

Most JFET and CMOS input op amps were measurable using this new CDM measurement using this new CDM measurement technology, you can measure most JFET and CMOS input op amps. To illustrate this method, take the measurement of low-noise precision JFET operational amplifier LT1792 as an example. The following table lists the calculated values ​​of impedance (Z), phase angle (θ), reactance XS and CDM within a certain frequency range. When the phase angle is -90°, the impedance appears purely capacitive.

Table 1. Impedance measurement of LT1792 at different frequencies when the power supply is ±15 V

frequency

Z (kΩ)

θ

XS(kΩ)

CS = CDM =
1/(2 ×π× XS ×Freq) (pF)

500 kHz

33

-89°

-32.9

9.7

600 kHz

27

-90°

-26.9

9.8

700 kHz

22.6

-90°

-22.6

10

800 kHz

19.65

-90°

-19.7

10.1

900 kHz

17.4

-90°

-17.4

10.2

1 MHz

15.64

-89.9°

-15.6

10.2

2 MHz

7.76

-89.8°

-7.76

10.25

3 MHz

5.1

-90°

-5.1

10.4

4 MHz

3.74

-90°

-3.74

10.6

5 MHz

2.92

-90°

-2.92

10.9

Table 1 above shows the measurement results in the frequency range of 500 kHz to 5 MHz. The phase in this frequency range is close to pure capacitive (phase angle -89° to -90°). At the same time, the reactance XS determines the total input impedance, that is, Z≈XS. The calculated average of CDM is approximately 10.2 pF. The highest measurement frequency is 5 MHz, because the device bandwidth can only reach 5.6 MHz. The results at lower frequencies become incoherent. It is speculated that this is because the behavior of the operational amplifier reduces the output voltage, the CDM current is rapidly reduced, and the XS impedance becomes larger at low frequencies.

The output of the operational amplifier should also be checked at each step frequency to ensure that it will not be overdriven by the signal generated by the impedance analyzer. The amplitude of this signal from HP4192A can be adjusted in the range of 0.1 V to 1.1 V, which is just enough to produce a swing in the output of the op amp and slightly change the voltage level in the inverting input pin. Figure 5 shows that when the frequency is 800 kHz, the peak-to-peak undistorted signal (green signal) at the output of the operational amplifier is 28 mV. The yellow signal of 2.76 V peak-to-peak amplitude (1 V rms) is directly detected from the oscillator output port of the analyzer. For the sake of fairness, it can be arbitrarily decided not to allow output distortion, no matter for DUT or HP4192A detector. Although this setting is relatively unaffected by probe effects, the probe has been removed when acquiring actual data on impedance and phase.

A Method of Directly Measuring Input Differential Capacitance of Operational Amplifier

Figure 5. The output detected at the HP4192A “Osc” output port and the op amp output pin.

We conducted a test to measure CDM under different power supply voltages. The dependence of the CDM on the power supply and common-mode voltage will vary from operational amplifier to operational amplifier; different topologies and transistor types are expected to cause different junction parasitics between high-voltage power supplies and low-voltage power supplies. Table 2 shows the results of the LT1792 when the power supply is stabilized within ±5 V. The average measured value of the CDM is 9.2 pF, which is quite close to the result of 10 pF when using a ±15 V power supply. Therefore, it can be concluded that the CDM of the LT1792 will not change significantly with changes in the power supply voltage. This is in sharp contrast to its CCM, which changes significantly with the supply voltage.

Table 2. Impedance measurement of LT1792 at different frequencies when the power supply is ±5 V

frequency

Z (kΩ)

θ

XS(kΩ)

CS = CDM(pF)

500 kHz

37

-90°

-37

8.6

600 kHz

30

-91°

-30

8.8

700 kHz

25.3

-91°

-25.2

9

800 kHz

twenty two

-91°

-twenty two

9

900 kHz

19.5

-91°

-19.5

9

1 MHz

17.5

-91°

-17.5

9.1

2 MHz

8.62

-92°

-8.62

9.2

3 MHz

5.6

-93°

-5.6

9.5

4 MHz

4.07

-94°

-4.07

9.8

5 MHz

3.14

-94°

-3.14

10.1

At the same time, bipolar input operational amplifiers are almost as simple as their FET counterparts. However, because they are connected in parallel with the CDM current, their high input bias current and current noise are more obvious. In addition, the inherent differential resistance RDM of the bipolar differential pair input is also connected in parallel with the CDM. Table 3 shows the impedance measurement of the low-noise precision amplifier ADA4004 as an example. Obviously, phase does not indicate pure capacitive behavior, because it is far away from -90°. Although the frequencies of 4 MHz, 5 MHz, and 10 MHz are very close, the parallel equivalent impedance RC model will be suitable for this example so that the CDM can be extracted from other resistances. Therefore, Table 3 shows the calculated values ​​of parallel conductance GP, susceptance BP and CDM in a certain frequency range, where CP is assumed to be equal to CDM.

Table 3. Impedance measurement of ADA4004 in the entire frequency range when the power supply is ±15 V

frequency

Z (kΩ)

θ

GP(μS)

BP(μS)

CP = CDM =
BP/(2 ×π×Freq) (pF)

500 kHz

29.4

-36°

27.5

20

6.4

600 kHz

27.2

-41°

27.6

24.1

6.4

700 kHz

25.3

-45.4°

27.6

28

6.4

800 kHz

23.5

-49°

27.9

32

6.4

900 kHz

twenty two

-52°

28

35.7

6.3

1 MHz

20.7

-54.3°

28.1

39.3

6.3

2 MHz

12

-72.6°

24.9

79.4

6.3

3 MHz

7.8

-79.2°

twenty four

126

6.7

4 MHz

5.8

-81.8°

24.5

171

6.8

5 MHz

4.7

-83.5°

24.2

212.7

6.8

10 MHz

2.5

-86°

28

319.5

6.3

According to the results in Table 3, it can be estimated that the CDM of the ADA4004 is about 6.4 pF. The results also show that, in the entire frequency range shown in Table 3, the CDM has a considerable parallel conductance GP, which is not a purely capacitive CDM. Measurements show that the actual input differential resistance of the bipolar operational amplifier is about 40 kΩ (1/25 μS).

Note: We tried to measure other types of operational amplifiers, such as zero-drift operational amplifiers (LTC2050) and high-speed bipolar operational amplifiers (LT6200). The results are non-coherent, presumably due to the switching artifacts in the zero-drift operational amplifier and the excessive current noise in the high-speed bipolar operational amplifier.

Reference conclusion

It is not difficult to measure CDM. One thing to note is that HP4192A reports impedance in amplitude and angle. The capacitance reading is assumed to be a simple series RC or parallel RC, and the input impedance of the op amp may be much more complicated. Capacitance readings should not only use surface nominal values. Each operational amplifier has its own unique situation. The frequency range in which the input impedance is dominated by capacitive reactance may vary depending on the design. The design of the input stage, the devices and processes used, the Miller effect, and the packaging can all make a large overall contribution to the differential input impedance and its measurement. We measured the JFET input op amp and the bipolar input op amp and showed the CDM result and the RDM result of the bipolar input op amp.

References

references

1 Gustaaf Sutorius. “Challenges and Solutions for Impedance Measurement”, Keysight, March 2014.

Thanks

Glen Brisebois thanked Brian Hamilton for presenting this challenge, Aaron Schultz and Paul Henneuse for their support, and Henry Surtihadi, Kaung Win, Barry Harvey and Raj Ramchandani for their comments.

Arthur Roxas thanked Paul Blanchard, Matt Duff, Jess Espiritu and Kristina Fortunado for providing the opportunity to complete the project with Glen.

About the Author

Glen Brisebois is an applications engineer in the signal conditioning department of Analog Devices in Silicon Valley. He studied at the University of Alberta in Canada with a bachelor’s degree in physics and electrical engineering. He had been in hermitage with Trappists and Caldusians for several years, but he could not stop thinking about circuits. Now, he has a happy marriage and the company of his children. He does a lot of circuit-related work, but sometimes advocates ADC. His article “Signal Conditioning of High Impedance Sensors” published in EDN magazine won the 2006 Best Paper Award. Contact information:[email protected]