Realize the multi-master RS485 bus design of CSMA/CD by using the method of hardware monitoring bus status

The emergence of intelligent instruments and fieldbus marks the arrival of the network era in the industrial control field, and has become the mainstream of industrial control. At present, a variety of field buses and corresponding communication protocols have appeared in the world, but the system cost is still too high for many small and medium-sized applications. The RS485 bus is used in many industrial control systems because of its simple structure, low cost, many optional chips, and easy maintenance.

The emergence of intelligent instruments and fieldbus marks the arrival of the network era in the industrial control field, and has become the mainstream of industrial control. At present, a variety of field buses and corresponding communication protocols have appeared in the world, but the system cost is still too high for many small and medium-sized applications. The RS485 bus is used in many industrial control systems because of its simple structure, low cost, many optional chips, and easy maintenance.

1. The characteristics of RS485 bus and existing working methods

The RS485 bus uses a twisted pair as the physical medium and works in a half-duplex communication state, that is, at the same time, only one node on the bus can become the master node and be in the transmitting state, and all other nodes must be in the receiving state. If there are more than two nodes in the sending state at the same time, it will cause the data transmission of all the senders to fail, that is, the so-called bus conflict. In order to avoid bus conflicts, the RS485 bus has the following characteristics:

In terms of working mode, the general RS485 bus works in master-slave mode. The entire communication bus system is composed of a master node and several slave nodes, and the master node continuously inquires whether the slave nodes have communication requirements. If yes, hand over the control of the bus to a certain slave node, and return the control of the bus immediately after the slave node finishes sending it. In addition, there is a “wheel master and wheel slave” working mode, that is, the bus control power is transferred between various nodes in a token ring-like manner, and the node that has the control power becomes the master node, and other nodes become the slave nodes. When a node finishes sending data, it transfers the control right of the bus to the neighboring node, and this node passes the control right down after processing the communication demand of the node. The RS485 working mode of token ring is shown in Figure 1.

From the communication node, the node on the RS485 bus must have the function of switching its driver to a high-impedance state, so that it will not affect the bus state after sending the data. This kind of driver implements the sending state-one of the effects of high-impedance state switching? From when the data is sent to the high-impedance state of the device, a conversion delay is required. This conversion delay is a very important parameter in 2-wire communication. This time cannot be too short, otherwise the last part of the character sent out will be lost because it has not been established on the bus. At the same time, this time cannot be too long, otherwise other devices have already started sending data before the sending end has turned to high impedance state, which will cause bus conflicts. Therefore, the master device on the 2-wire RS485 bus must know the response time of all slave devices and ensure that the driver is set to a high impedance state before the slave device responds to receive data from the slave device. The conversion delay of commonly used equipment is the time it takes to send one byte at the current baud rate.

The above-mentioned working method adopted to adapt to the special features of the RS485 bus also introduces some deficiencies. First of all, the above-mentioned two bus working modes have greater limitations in many industrial control occasions that require high real-time and reliability. The main reason is that the slave nodes of the master-slave bus do not have the right to initiate communication, and the communication between each other needs to be transferred through the master node. However, the time for each node on the “wheel master and wheel slave” bus to wait for the control of the bus is unknown, and real-time performance cannot be guaranteed. At the same time, if the master node of the master-slave type or the node that obtains the token in the “wheel master and wheel-slave” type fails, the work of the entire bus will be paralyzed, and the risk will be too concentrated. Secondly, the implementation of “transmit state-high impedance state” switching of the driver and consideration of switching delays and other requirements make programming more complicated. At the moment of power-on, the CPU is damaged or the program runs out, you also need to consider complex fault protection and other issues, otherwise it will easily cause bus faults.

 Realize the multi-master RS485 bus design of CSMA/CD by using the method of hardware monitoring bus status

2. Implementation of CSMA/CD on RS485 bus

In order to solve the problem that each node actively obtains the control of the bus, people think of using the way of monitoring the bus status to realize the local judgment and acquisition of the control of the bus, which is what the CSMA/CD protocol actually does. That is, all nodes monitor whether there are other nodes on the bus sending data before sending, and if so, they will not send it temporarily. In addition, while sending data, it is monitored while sending. If a conflict is detected, both parties in the conflict stop sending. In doing so, it can not only ensure that each node has the right to initiate communication, but also minimize the chance of bus conflicts and improve the throughput of the entire system.

An existing method is to invert the output terminal of the bus receiver and then connect it to the external interrupt pin of the CPU, as shown in Figure 2. Use the method of triggering an interrupt to determine whether there is data transmission on the bus, and at the same time, combine the timer interrupt to determine whether the bus is idle. If the bus is free, get bus control and send data; then use the method of monitoring the data sent by yourself to determine whether a bus conflict occurs. This method solves the time delay problem of the distribution of bus control rights, but it needs to use at least 4 pins (INT0, RXD, TXD, driver enable pins), and occupy external interrupts and internal timer interrupts, and need to use software to monitor and send The data avoids bus conflicts. System resources consume more, programming is complicated, and the application in some occasions has limitations. On the basis of the above method, this paper proposes a method of using hardware to monitor the bus status, which truly realizes the CSMA/CD protocol. At the same time, the occupancy rate of system resources is reduced, and the judgment of bus conflicts is simplified. In addition, the driver’s automatic switching without delay is realized, which further improves the real-time performance of the system. The system works stably and reliably, and greatly improves the real-time performance of communication, which is especially suitable for real-time distributed control occasions.

Realize the multi-master RS485 bus design of CSMA/CD by using the method of hardware monitoring bus status

2.1 System block diagram

The system is composed of two parts: bus state judgment logic and driver automatic switching logic, as shown in Figure 3. The system resource only occupies the three pins of the CPU: RXD, TXD, and bus status indicator pins, without any interruption. In terms of software implementation, it becomes very simple due to the use of hardware to determine the bus status, and only minor modifications to the standard 232 communication program are required.

Realize the multi-master RS485 bus design of CSMA/CD by using the method of hardware monitoring bus status

2.2 The bus state judgment logic

The circuit is composed of dual RS485 bus receivers, and the outputs of the two receivers are combined to obtain the bus status signal. The symmetrical form of the bias resistor network makes the levels of the two buses equal when the bus is not being driven. The bus state judgment logic is shown in Figure 4. Since the two access points of the receiver have different levels, when the bus is in a high-impedance state or the bus is short-circuited, the two receivers are both high-level outputs, and the bus state is high. Because the A and B lines are respectively connected to the different receiving ends of the two receivers through 6.8kΩ resistors, when any certain logic state appears on the bus, it will cause the output of one of the receivers to become low, so The bus status becomes low, indicating that the bus is occupied. After theoretical calculation and EWB simulation, the network has an input impedance of 12.2kΩ from points A and B, which just meets the receiver input impedance requirement of the RS485 protocol.

Realize the multi-master RS485 bus design of CSMA/CD by using the method of hardware monitoring bus status

2.3 The drive has no delay automatic switching logic

In order to realize the driver’s automatic switching without delay, the TXD signal is inverted and then connected to the driver enable, and the driver input is directly grounded, as shown in Figure 5. This process enables the drive to be opened only when the data is 0, and the data 0 is sent out. When the data is 1 or there is no data, it will be closed immediately, which shortens the switching time. But by doing so, data 1 cannot be sent out normally. In order to make the serial data can be received correctly, there are two ways to generate 1 in the data. The first method is to use the bus to determine the output of the forward receiver in the circuit? Point OUT+? Snow is used as the RXD signal, which outputs logic 1 when the bus is idle, open and short-circuited, and is in phase with the RXD signal. The second method is to use a chip similar to the MAX3080 with a fail-safe function as the receiver. MAX3080 adjusts the trigger threshold voltage of the receiver from -200mv~+200mv to -200mv~-50mv, and can also output logic 1 when the bus is idle, open circuit and short circuit. If each node on the bus uses these methods, then all nodes can realize the automatic switching of the drive without delay without worrying that the 1 in the data cannot be received correctly.

Realize the multi-master RS485 bus design of CSMA/CD by using the method of hardware monitoring bus status

2.4 The realization of the software

To send data, just encapsulate the standard serial port function putc() into a function RS485PutString() to send data. In the RS485PutString() function, various bus status judgment strategies can be easily implemented, even the CSMA/CD protocol, to implement carrier monitoring, monitoring while sending. You can also perform advanced programming on the basis of this function, such as defining the real-time level of different data packets, and defining bus timeout judgments.

The main flow of this function is shown in Figure 6.

Judging the bus status is simply to read the output of the bus status judgment circuit. High means idle, and low means the bus is occupied. In order to reduce the misjudgment, the judgment is usually continued for a period of time after judging that the bus state is idle, and the specific bus state judgment strategy should be adjusted according to the communication protocol.

If it is judged that the bus is free, data can be sent. During the sending process, it is convenient to continue to read the bus status for conflict detection while sending and listening. Once a conflict is found, the sender abandons this data transmission and shifts to the enhanced conflict process (continue to send a few 0x00 to make all parties confirm that a bus conflict has occurred), and then enter the bus listening process. The previous RS485 bus conflict detection and processing mechanism is to monitor and receive the data sent by oneself, and then compare whether the received data is consistent with the sent data, and determine whether a bus conflict occurs, which is more complicated in software implementation. The conflict detection of this system is very simple: read the status of the bus status indicator pin once after sending a byte. If the bus is found to be occupied, a bus conflict has occurred.

Regarding the receiving program, because the receiver is always on, the interrupt service program of the serial receiver can still be used to put the received data into the buffer, and then the command interpreter will process the received commands. In essence, it is exactly the same as the RS232 serial communication program, except that if the receiver is normally open, when sending data by yourself, remember to turn off the serial receiver interrupt, and then turn it on after sending to avoid unnecessary interrupts. Service program.

In addition, the driver and bus status judgment logic can be combined to detect/alarm the bus for open circuit and short circuit. Specifically, a certain node enables the bus driver and then judges the bus status. If the bus still shows that the bus is idle, it means that the bus is short-circuited or the bus-to-bus state judgment logic is open.

2.5 Existing shortcomings

The bus state judgment logic in this method has relatively high requirements for the logic 0 state, and it needs the B line level to be higher than the A line by about 1.1V to get the low level. If the output terminal (OUT+) of the forward receiver in the bus judgment circuit is used as the RXD signal, it will not meet the RS485 -200mV threshold level standard due to the requirement of logic 0. If another receiver with fault protection function is used in parallel, it can certainly meet the -200mV threshold level standard, but the input impedance of the entire node will be reduced to 6kΩ.

The above shortcomings are that they cannot fully meet the standard RS485 bus standard, but they will not affect the work effect under certain conditions. For example, although the impedance is reduced, when the number of nodes does not exceed 16, it can work well.

Experiments show that this multi-master RS485 bus that implements CSMA/CD works stably, has high reliability, and greatly improves real-time performance. It is especially suitable for distributed control systems that emphasize real-time, and can easily realize real-time exchange of control information between points.

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